Multi-Site Testing to Maximize Operational Efficiency
Both CASSINI and RI7100A ATE platforms fully support multi-site handlers and probers in multiple configurations (ping-pong or parallel, grid or rows). The goal for multi-site test configurations is to optimize Operational Efficiency (OE) by using 100% of the test resources while the Handler or Prober is preparing the next DUT, called the Handler Intex Time (HT). Selecting the number of sites (1, 2, 4 or more) to maximize test resource utilization is dependant on the difference between Total Test Time (TTT) and the Handler Index Time (HT). Operational Efficiency (OE) is calculated as a ratio between the Total Test Time and Handler Time (OE = TTT/HT). A 100% OE would mean that the test system does not have to wait for the handler to load the next DUT and the handler does not have to wait for the test system to complete testing. Since ROOS test systems can average 1,000s of highly accurate tests per second, the most effective multi-site designs often loose effectiveness past just 2 sites, drastically simplifying design and improving reliability. Dual Site Handlers are often more reliable and cost effective than highly complex quad site or more solutions. Our unique Fixture design allows for rapid debugging and incremental deployemnt of single and multi-site testing, reusing the same precision components used at 1st silicon (single site, hand socket) to multi-site production test at high volumes.
Handler Interfaces For All DUTs
Roos Instruments has accumulated wide experience interfacing its Test Head and Fixtures so that any make or model of IC handler can be supported. Every ROOS system includes technical assistance and interfacing support to ensure high-speed operation. ROOS systems operate successfully with pick and place, gravity fed, bowl, strip, parallel and multi-site package handlers. Programmable Handler Pods are used to interface to standard Serial, Parallel, or GPIB handler control ports. ROOS has built-in support for many common handler manufacturers and 3rd party docking specialists, including: Aetrium, Delta Design, DJ Tech, inTest, MutiTest, Seiko-Epson, SOWA, Rasco and more... Standard Docking Kits: RIK0070A - RI Large Handler Dock and RIK0068A - Fixture Docking Ears
With the trend toward multi-chip modules, it is becoming very important to test the die as well as the packaged parts. Anticipating this, ROOS offers a full function wafer probing system with the ability to measure complex wafers and provide complete wafer map outputs. ROOS works in conjunction with Cascade Microtech and other socket manufacturers to meet your requirements for these challenging aspects of RF IC testing.
Sockets and DUT Boards
A key part of the ability to measure devices is to connect reliably to them. ROOS designs and builds two layer DUT boards to customer specifications and guarantees their performance. Our DUT board design is compatible with several high-performance sockets such as Johnstech, Aries,Cascade Microtech , Phoenix Contact, or Yokowo. We also work with several customers who prefer to build their own contactors and DUT boards.
Data Analysis and Exporting
Test data is emitted in industry standard STDF (binary and ASCII) format. An open system design, standard system software, and modular hardware, enables your ROOS system to inter-operate with any network, giving you remarkable flexibility to distribute test data. ROOS offers a unique "0-impact" data collection system where there is absolutely NO overhead or time penalty for collecting detailed measurement data for every aspect of your DUTs specifications. By collecting raw measurement data and processing it after in spare computation cycles, the System Controller is able to generate detailed STDF data of full vector corrected measurements offering characterization level detail at production speeds.
- Docking Prober and Handler Solutions
- Industry Standard Data Integration
- Powerful Software Development
- Enterprise-level Test Software Management
- Lower Cost Of Test
- RITS (Low Risk/No Cap)
- Fastest RF ATE
- Bench to HVM
- RF-centric Board Design
- Characterization, Correlation and Verification
- High Speed Digital