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These general measurement limits are affected by tester and fixture configuration.



Measurement Time (msec.) Std. Dev
Power 2.5 <0.02 dB
Frequency 11.5 <0.5 Hz
S11, S12, S21 & S22 12 0.02 dB (S21)
Noise Figure 2 0.1 dB
Phase Noise 60 0.3 dB
IIP3 78 0.3 dB
P1dB 17.5 0.1 dB
ACLR or ACPR 93 0.4 dB
Harmonic Power 56 0.05 dB
I/Q Mod Phase & Amp 25 0.1 dB, 0.1 deg.
I/Q Demod Phase & Amp 60 0.02 dB, 0.15 deg.
DC Voltage 2 0.025%
DC Current 2 0.03%

Typical Noise Floor <-155 dBm/Hz to 6 GHz


Typical Test System IIP3


1 dB Noise Figure – Two Testers



Noise Floor Measurements
Pout +34.9 dBm, Noise Floor <-85 dBm


VCO Phase Noise Measurements
-114 dBc/Hz at 100 kHz Offset
-137 dBc/Hz at 1 MHz Offset


DUT Measurement Performance
LNA Noise Figure <1.0 dB
IIP3 >+25 dBm
PA CDMA ACPR1 <-60 dBc
CDMA ACPR2 <-70 dBc
Mixer Noise Floor <-150 dBm/Hz
PLL/VCO Phase Noise <-114 dBc/Hz @ 100 kHz
<-137 dBc/Hz @ 1 MHz
Dividers Frequency <1 Hz Resolution to 20 GHz
I/Q Mod Phase Match <0.1 degree
Amplitude Match <0.025%
LO Rejection <-60 dBS
Image Rejection <-70 dBS
I/Q Demod Phase Match <0.1 degree
Amplitude Match <0.1 dB

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