RI ATE System Controller
Instead of a distributed processor approach, the RI7100A and Cassini ATE systems both use a single, high performance system controller and a proprietary high speed communication interface called RIFL (Roos Instruments Fiber Link) to control critical test sequence timing and ensure total execution time repeatability. This architecture takes full advantage of the rapid technology growth in the consumer computer market, allowing for relatively low cost system controller performance upgrades and ensuring a long product life cycle. RI typically offers several versions of System Controllers to address the varying needs and use case of our customers. The above photo is of the RIK0078A Dual Monitor System Controller and Development Station option targeted at Test Development and Characterization use.
Test Plan Generation & Execution
Measurement Control and Signal Processing
x86 based Computer (embedded or tower)
OS/2 Operating System
RI System Software
System RIFL II or III Interface
The RI Fiber Link (RIFL) found in early RI7100A systems used optical cables, but RIFL II uses shielded RJ45 cables (not typical "CAT5" network cables) and RIFL III uses a distinctive round 10 pin connector.
The RIFL ports are not ordered, so any device can be attached to any available port on the RIFL hub. To connect a RIFL cable, insert the RIFL II (shielded RJ45) or RIFL III (Round 10 pin) connector into an open RIFL port, until it clicks. To remove, press down on the tab along the top of the connector and pull. You can plug the cable into either the hub or the instrument first, the order does not matter. RIFL II to RIFL III cables are sometimes used to connect the different physical interfaces.
RI System Control Interface with RIFL II & RIFL III
Cassini & RI7100A Gen 3 RI ATE System Communication and Control
RIFL II and RIFL III connectors
RI Interface Dongle plugs into System Computer's Parallel Port
RI Instrument Control thru RIFL II Decoder Module
External GPIB control through RIFL II to GPIB Interface Pod
Plug and Play auto configuration of RIFL Nodes
Scheduled Timing and Event Control with 1 μsec resolution
For recent RI7100A and Cassini systems, the RI System interface and the RI Fiber Link 2 (RIFL II) provide the test system's internal low latency communication and instrumentation control link. The RI System interface state machine controller is an external dongle attached to the System Computer's parallel port. It provides the RIFL II interface connection and timing clock signal used throughout the system. The second generation RIFL "2" does not use fiber-optic cables any longer, but uses the efficient RIFL protocol with a proprietary bus that connects the System Interface to the RI instrumentation similar to a typical network hub configuration. RIFL II is not unshielded Category 5 (CAT5) cable typically used on computer network LANs. Each RI instrument contains a RIFL II interface connection and a RIFL II Decoder Module. RI instrumentation in the test system do not contain microprocessors for control. Control of all functions is provided by the System Computer through the RIFL II bus to the RIFL II Decoder in each RI instrument. A RIFL Decoder Module is an independent node on the RIFL II network bus.
ATTENTION! RIFL II is not unshielded Category 5 (CAT5) cable typically used on computer network LANs.
To control any GPIB instruments in the system, an RI System GPIB Pod contains a RIFL II Decoder Module, a RIFL II to GPIB Interface and GPIB connector for connecting GPIB cables between the RI System and any GPIB instruments.
The RIFL II bus is a self addressing (plug and play) interface. The RIFL interface transfers serial data, and provides the system with 1 μsec scheduled timing and event control. For Cassini systems, the RJ45 interface is replaced by a distinctive round 10 pin connector that is electrically identical to the RIFL II connectors.
RI7100A only: This page applies only to RI7100A ATE Systems!
RI7100A Gen 1 and Gen 2 System Control Interface with RIFL
1st and 2nd Generation RI ATE System Communication and Control
RI Fiber-optic Link (RIFL) Communication protocol
RI Interface ISA PC Card Plugs into System Computer ISA Bus
RI Instrument Control thru RIFL Decoder Modules
External GPIB control through RIFL to GPIB Interface in the System Receiver
Scheduled Timing and Event Control with 1 μsec resolution
The RI System Interface and the RI Fiber Link (RIFL) provide the test system’s optically isolated internal high bandwidth communication and instrumentation control link. The RI System Interface state machine controller uses standard ISA interface on the System Controller (computer). It provides the RIFL interface connection and timing clock signal. The RI Fiber Link uses the efficient RIFL protocol in a daisy chain, or token ring, LAN type proprietary bus that connects the System Interface to each of the RI instruments. Each RI instrument contains a RIFL interface connection and a RIFL Decoder Module. RI instrumentation in the test system does not contain microprocessors for control. Control of all functions is provided by the System Computer through the RIFL bus to the RIFL Decoder in each RI instrument. Each RIFL Decoder Module is an independent node on the RIFL network bus and must have a unique Node Number.
To control a GPIB instruments in the system, an RI System GPIB connection is provided on the rear panel of the system receiver. The receiver contains a RIFL Decoder Module, a RIFL to GPIB Interface and GPIB connector for connecting GPIB cables between the Receiver and any GPIB instruments. Please note IEEE cable length requirements! 4 Meters with 2 meters between instruments.
The RIFL interface is unidirectional and transfers high speed serial data that provides the system with both precise scheduled timing (1 μsec resolution) and event control.